1. Field of the Invention
The present invention relates to an integrated circuit design system, in particular a computer aided design (CAD) system, and to a method of circuit design.
2. Description of the Related Art
In designing an integrated circuit (IC) layout, it is necessary to take a number of timing factors into account. Between any two clocked components in an integrated circuit (such as latches) there is a “critical path” and in the circuit as a whole there is a “fastest path.”
The critical path is the slowest path between two clocked components, that is the longest time that data from one component takes to reach the other. The maximum speed of the IC as a whole is determined by the critical path.
The fastest path is the shortest time for data at one clocked component to reach another. Where there is a small number of components between any two clocked components the fastest path can, in fact, be too fast with the result that errors occur due to signals arriving too quickly.
We have appreciated the need to design integrated circuits for best performance by balancing both the critical and fastest paths in a design. In particular, we have appreciated that the critical path should not be adversely affected when adjusting the fastest path.